# Enable a peripheral interface in the OOB subsystem The out-of-band (OOB) processor supports remote debug with SPI-NOR memory access, which lets an IT team access the device and repair or clean it if the device is stolen. Configure the OOB instance based on whether the use case is nonsecure or secure. 1. For a nonsecure OOB use case, enable and configure the required instance. 1. Open the OOB nonsecure device tree file: dt_settings/soc/glymur_oobmss_ns/core/buses/qupv3-se.dtsi Copy to clipboard 2. Enable and configure the required instance. For example: &qup0\_se2 { compatible = “qcom,qup-uart”; // Change to i2c or spi for other serial engines current-speed = <115200>; status = “disabled”; }; 3. For the original definition of the instance, see: dt_settings/soc/glymur_oobmss_ns/core/buses/qupv3.dtsi Copy to clipboard 2. For a secure OOB use case, enable and configure the required instance. 1. Open the OOB secure device tree file: dt_settings/soc/glymur_oobmss_tee/core/buses/qupv3-se.dtsi Copy to clipboard 2. Enable and configure the required instance. For example: &qup0\_se2 { compatible = “qcom,qup-uart”; // Change to i2c or spi for other serial engines current-speed = <115200>; status = “disabled”; }; 3. For the original definition of the instance, see: dt_settings/soc/glymur_oobmss_tee/core/buses/qupv3.dtsi Copy to clipboard ## Related - [Configure the PCIe and USB interfaces](https://docs.qualcomm.com/doc/80-A0399-8/topic/configure-pcie-usb-interfaces.html) - [Debug the USB interface](https://docs.qualcomm.com/doc/80-A0399-8/topic/debug-usb.html) - [References](https://docs.qualcomm.com/doc/80-A0399-8/topic/references.html) Last Published: Sep 17, 2026 [Previous Topic Enable the debug UART in the SoCCP](https://docs.qualcomm.com/bundle/publicresource/80-A0399-8/topics/enable-debug-uart-soccp.md) [Next Topic Configure the PCIe and USB interfaces](https://docs.qualcomm.com/bundle/publicresource/80-A0399-8/topics/configure-pcie-usb-interfaces.md)