# Enable QSPI for the SPI-NOR interface Enable QSPI for SPI-NOR in the pre-DDR XBL to use storage. SPI-NOR doesn’t require any TrustZone configuration. Configure the QSPI instance in the pre-DDR XBL settings loader for the target serial engine. ## Configure the QSPI instance 1. Open the QSPI settings loader source file: QcomPkg/SocPkg/Glymur/Settings/QUP/qup_settings_loader.c Copy to clipboard 2. Configure the required QSPI instance for the target serial engine. The following example configures `TOP_QUP_3_SE_0` for QSPI. se_dev_cfg TOP_QUP_3_SE_0 = { .se_base_addr = (uint8 *)(QUPV3_3_CORE_BASE_ADDRESS + QUPV3_SE_BASE_OFFSET), .se_clock = (uint8 **) (se_clocks_str_3 + 0), .current_se_freq = 19200, .se_id = 0, .protocols_supported = (I2C_SUPPORTED | UART_SUPPORTED | SPI_SUPPORTED), .protocol_in_use = SE_PROTOCOL_QSPI, .iface_data = IFACE_DATA((GSI_MODE),0,0,0), .io = {GPIO_DATA(128,3,0),GPIO_DATA(129,3,0),GPIO_DATA(127,3,0),GPIO_DATA(132,3,0),GPIO_DATA(130,3,0),GPIO_DATA(131,3,0)}, .flags = (USES_DDR_BUFFER | USES_INTERNAL_DDR_MEM | ENABLE_FATAL_ON_TIMEOUT | POLLED_MODE), .polled_mode = 1, .dt_available = FALSE, }; Copy to clipboard ## Related - [Enable a peripheral interface in the aDSP](https://docs.qualcomm.com/doc/80-A0399-8/topic/enable-peripheral-interface-adsp.html) - [Enable a peripheral interface in the SoCCP](https://docs.qualcomm.com/doc/80-A0399-8/topic/enable-peripheral-interface-soccp.html) - [Enable a peripheral interface in the OOB subsystem](https://docs.qualcomm.com/doc/80-A0399-8/topic/enable-peripheral-interface-oob.html) Last Published: Sep 17, 2026 [Previous Topic Enable the UART interface](https://docs.qualcomm.com/bundle/publicresource/80-A0399-8/topics/enable-uart-interface.md) [Next Topic Enable a peripheral interface in the aDSP](https://docs.qualcomm.com/bundle/publicresource/80-A0399-8/topics/enable-peripheral-interface-adsp.md)