# Enable the SPI interface

Enable an SPI instance for the application processor (HLOS and UEFI) by
granting TrustZone access and then enabling the instance in each
subsystem device tree.

Grant TrustZone access permission, and then set the node status in the Linux kernel, UEFI, and XBL device trees. Complete the following steps for each subsystem that uses the instance.

Note

Remove any existing configuration before you reconfigure an instance. To configure an instance as SPI when it was previously set as I^2^C, review every location where it’s configured as I^2^C, remove those settings, and then continue.

1. Grant access permission in TrustZone in the `oem_qupac_config.h` file.

    File location

//trustzone_images/core/settings/buses/qup_access_control/config/glymur/oem_qupac_config.h
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    Add or update the security permissions entry

#define QUPV3_SE_SECURITY_PERMISSIONS_TABLE_DEFAULT \
        + { QUPV3_0_SE2, QUPV3_PROTOCOL_SPI, QUPV3_MODE_FIFO, AC_HLOS, TRUE, TRUE, FALSE }, /*Touchscreen SPI*/ \
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    1. Confirm that the subsystem mapping matches the security permissions configuration.

#define QUPV3_AC_SE_MAPPING_TABLE \
            + { QUPV3_0_SE2, AC_HLOS }, \
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2. Enable the instance in the Linux kernel device tree.

    1. Open the Linux kernel device tree file:

/arch/arm64/boot/dts/qcom/glymur.dtsi
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    2. Set the node status to `okay`.

spi1: spi@b84000 {
                compatible = "qcom,geni-spi";
                reg = <0x0 0x00b84000 0x0 0x4000>;
                interrupts = <GIC_SPI 1053 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
                clock-names = "se";
                dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
                       <&gpi_dma0 1 1 QCOM_GPI_SPI>;
                dma-names = "tx", "rx";
                pinctrl-0 = <&qup_spi1_data_clk>,
                            <&qup_spi1_cs>;
                pinctrl-names = "default";
                status = "disabled";
            };
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3. For a UEFI use case, enable the instance in the UEFI device tree.

    1. Open the UEFI device tree file:

edk2-non-oss-qualcomm\Silicon\Qualcomm\Glymur\GlymurSiliconPkg\Settings\DeviceTree\Core\Buses\qup_common\qupv3.dtsi
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    2. Change the node status from `disabled` to `okay`.
    3. Enable the required instance in the following header file:

Silicon/Qualcomm/Glymur/GlymurSiliconPkg/Settings/DeviceTree/Include/qup_defines.h
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    4. Add the SPI library definition to the UEFI application `.inf` file:

[LibraryClasses]
            SPIApiLib
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    5. Add the SPI protocol definition to the UEFI application `.inf` file:

[Protocols]
            gQcomSPIProtocolGuid
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4. For an XBL use case, enable the instance in the XBL device tree.

    1. Open the XBL device tree file:

Settings\Soc\Glymur\Core\Buses\qup_common\qupv3.dtsi\qupv3.dtsi
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    2. Change the node status from `disabled` to `okay`.
    3. Enable the required instance in the following header file:

Settings\Soc\Glymur\Include\qup_defines.h
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    4. Enable the required instance, for example

#define ENABLE\_QUP0\_SE0
    5. Note that no SPI use case is currently enabled in XBL by default.

## Related

- [Enable the UART interface](https://docs.qualcomm.com/doc/80-A0399-8/topic/enable-uart-interface.html)
- [Enable QSPI for the SPI-NOR interface](https://docs.qualcomm.com/doc/80-A0399-8/topic/enable-qspi-spi-nor-interface.html)
- [Enable a peripheral interface in TrustZone](https://docs.qualcomm.com/doc/80-A0399-8/topic/enable-peripheral-interface-trustzone.html)

Last Published: Sep 17, 2026

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