# QUP serial engine reference

Each QUP instance has a fixed wrapper, base address, interrupt, clock,
and configuration macro.

Use the following reference tables to select the instance and its base
address, interrupt, and clock, and to confirm the board use case
assigned to each serial engine.

The following table lists the QUP instance, wrapper, base address,
serial engine interrupt number, per-instance clock, and
`oem_qupac_config.h` macro for each serial engine.

| QUP instance | Wrapper | Base address | SE interrupt | Per-instance clock | Config macro |
| --- | --- | --- | --- | --- | --- |
| `QUP_0` | `wrap_0` | `0x00B80000` | 4188 | `gcc_qupv3_wrap0_s0_clk` | `QUPV3_0_SE0` |
| `QUP_1` | `wrap_0` | `0x00B84000` | 4189 | `gcc_qupv3_wrap0_s1_clk` | `QUPV3_0_SE1` |
| `QUP_2` | `wrap_0` | `0x00B88000` | 4190 | `gcc_qupv3_wrap0_s2_clk` | `QUPV3_0_SE2` |
| `QUP_3` | `wrap_0` | `0x00B8C000` | 4191 | `gcc_qupv3_wrap0_s3_clk` | `QUPV3_0_SE3` |
| `QUP_4` | `wrap_0` | `0x00B90000` | 4192 | `gcc_qupv3_wrap0_s4_clk` | `QUPV3_0_SE4` |
| `QUP_5` | `wrap_0` | `0x00B94000` | 4193 | `gcc_qupv3_wrap0_s5_clk` | `QUPV3_0_SE5` |
| `QUP_6` | `wrap_0` | `0x00B98000` | 4194 | `gcc_qupv3_wrap0_s6_clk` | `QUPV3_0_SE6` |
| `QUP_7` | `wrap_0` | `0x00B9C000` | 4195 | `gcc_qupv3_wrap0_s7_clk` | `QUPV3_0_SE7` |
| `QUP_8` | `wrap_1` | `0x00A80000` | 385 | `gcc_qupv3_wrap1_s0_clk` | `QUPV3_1_SE0` |
| `QUP_9` | `wrap_1` | `0x00A84000` | 386 | `gcc_qupv3_wrap1_s1_clk` | `QUPV3_1_SE1` |
| `QUP_10` | `wrap_1` | `0x00A88000` | 387 | `gcc_qupv3_wrap1_s2_clk` | `QUPV3_1_SE2` |
| `QUP_11` | `wrap_1` | `0x00A8C000` | 388 | `gcc_qupv3_wrap1_s3_clk` | `QUPV3_1_SE3` |
| `QUP_12` | `wrap_1` | `0x00A90000` | 389 | `gcc_qupv3_wrap1_s4_clk` | `QUPV3_1_SE4` |
| `QUP_13` | `wrap_1` | `0x00A94000` | 390 | `gcc_qupv3_wrap1_s5_clk` | `QUPV3_1_SE5` |
| `QUP_14` | `wrap_1` | `0x00A98000` | 395 | `gcc_qupv3_wrap1_s6_clk` | `QUPV3_1_SE6` |
| `QUP_15` | `wrap_1` | `0x00A9C000` | 611 | `gcc_qupv3_wrap1_s7_clk` | `QUPV3_1_SE7` |
| `QUP_16` | `wrap_2` | `0x00880000` | 405 | `gcc_qupv3_wrap2_s0_clk` | `QUPV3_2_SE0` |
| `QUP_17` | `wrap_2` | `0x00884000` | 615 | `gcc_qupv3_wrap2_s1_clk` | `QUPV3_2_SE1` |
| `QUP_18` | `wrap_2` | `0x00888000` | 616 | `gcc_qupv3_wrap2_s2_clk` | `QUPV3_2_SE2` |
| `QUP_19` | `wrap_2` | `0x0088C000` | 617 | `gcc_qupv3_wrap2_s3_clk` | `QUPV3_2_SE3` |
| `QUP_20` | `wrap_2` | `0x00890000` | 618 | `gcc_qupv3_wrap2_s4_clk` | `QUPV3_2_SE4` |
| `QUP_21` | `wrap_2` | `0x00894000` | 619 | `gcc_qupv3_wrap2_s5_clk` | `QUPV3_2_SE5` |
| `QUP_22` | `wrap_2` | `0x00898000` | 493 | `gcc_qupv3_wrap2_s6_clk` | `QUPV3_2_SE6` |
| `QUP_23` | `wrap_2` | `0x0089C000` | 494 | `gcc_qupv3_wrap2_s7_clk` | `QUPV3_2_SE7` |
| `QUP_24` | `wrap_3` | `0x00980000` | 840 | `gcc_qupv3_wrap3_s0_clk` | `QUPV3_3_SE0` |
| `QUP_25` | `wrap_3` | `0x00984000` | 841 | `gcc_qupv3_wrap3_s1_clk` | `QUPV3_3_SE1` |

Depending on which QUP an OEM uses, see the pin assignment spreadsheet
for the GPIO numbers of that QUP. To enable another I^2^C instance, modify
the values for the QUP that the instance is configured for, and contact
QTI support for further questions.

The Snapdragon X2 superset assigns many serial engines to a specific
board use case. The following table lists the notable serial engine use
case assignments across the top QUPs and the Sensing Hub (SSC) QUPs.

| Serial engine | Use case |
| --- | --- |
| `QUP0_SE2` (L2) | SPU UART |
| `QUP0_SE3` | USB0 PD controller/retimer I^2^C |
| `QUP0_SE4` | Third-party prebuck telemetry |
| `QUP0_SE5` | Application processor I^2^C (SAR, PM8010, eUSB repeaters) |
| `QUP0_SE7` | USB1 PD controller/retimer I^2^C |
| `QUP1_SE2` | Touchscreen QSPI |
| `QUP1_SE3` | Security SPI (TPM) |
| `QUP1_SE5` | USB2 PD controller/retimer I^2^C; PS195 HDMI bridge I^2^C (firmware update,<br>debug) |
| `QUP1_SE6` | Bluetooth UART |
| `QUP2_SE2` | Touchscreen SPI (secondary); EC OOB OPQ SPI-M |
| `QUP2_SE3` | Flash programming 2W-UART for Nuvoton EC; keyboard 4W-UART |
| `QUP2_SE4` | aDSP I^2^C (charger/fuel gauge) |
| `QUP2_SE5` (L2) | HLOS debug UART |
| `QUP2_SE6` | Embedded controller UART |
| `QUP2_SE7` (L2) | SoCCP debug UART |
| `QUP3_SE0` | QSPI (boot) — Apps and OOB |
| `SSC_QUP0_SE0` | I^3^C IMU #0 and #1 (Sensor I3C0) |
| `SSC_QUP0_SE2` | I^2^C magnetometer #0 (Sensor I2C2) |
| `SSC_QUP0_SE3` | I^2^C ALS+Color and pressure sensors (Sensor I2C3) |
| `SSC_QUP0_SE5` | WCN Bluetooth Low Energy |
| `SSC_QUP0_SE6` | EC to SSC connection |
| `SSC_QUP0_SE8` | Always Sensing Camera SSC I^2^C and CCI I^2^C |

## Related

- [Provide HLOS access to the SMMU](https://docs.qualcomm.com/doc/80-A0399-8/topic/provide-hlos-access-to-smmu.html)
- [Enable the I2C interface](https://docs.qualcomm.com/doc/80-A0399-8/topic/enable-i2c-interface.html)
- [Enable the SPI interface](https://docs.qualcomm.com/doc/80-A0399-8/topic/enable-spi-interface.html)

Last Published: Sep 17, 2026

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