# USB controller reset control

The USB controller is reset through both clock controller reset
mechanisms and a controller register bit.

Use the following tables to confirm which clock controller reset resets
each block and which register bit resets the entire controller.

The following table lists the clock controller reset mechanisms and the
block that each one resets.

| Clock name | Reset control for | Comments |
| --- | --- | --- |
| `GCC_USB4_0_DP0_PHY_PRIM_BCR` (phy) | SS-PHY | Resets the SS-PHY control and status registers. |
| `GCC_USB3_PHY_PRIM_BCR` (common) | SS-PHY | Resets the SS-PHY. |
| `GCC_QUSB2PHY_PRIM_BCR` (phy\_reset) | eUSB2-PHY | Resets the eUSB2-PHY. |
| `GCC_USB30_PRIM_BCR` (core\_reset) | DWC3 controller | Clock controller output that resets the USB controller. |

The following table lists the USB controller register reset mechanism.

| USB controller register | Register bit field | Reset control for | Comments |
| --- | --- | --- | --- |
| `DWC_USB3_DCTL` | `CSFTRST` [Bit 30] | DWC3 controller | Resets the entire USB controller; you must redo controller<br>initialization. |

## Related

- [Enable a USB controller in Device mode](https://docs.qualcomm.com/doc/80-A0399-8/topic/enable-usb-controller-device-mode.html)
- [Configure UEFI USB](https://docs.qualcomm.com/doc/80-A0399-8/topic/configure-uefi-usb.html)
- [Debug the USB interface](https://docs.qualcomm.com/doc/80-A0399-8/topic/debug-usb.html)

Last Published: Sep 17, 2026

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