# Display overview
The Qualcomm^®^ Adreno™ Display Processing Unit (DPU) provides hardware-accelerated image processing. The DPU retrieves pixel data from memory and sends it to the display peripherals through standard interfaces.
Figure: Qualcomm Adreno DPU display architecture.
The DPU provides the following image processing and interface
capabilities:
- **Image processing** includes the following:
- **Composition**: blends individual layers into a single frame and sends the frame to the display panel.
- **Scaling**: supports upscaling and downscaling of the source image to match the panel resolution.
- **Color format conversion**: converts colors from one color format to another, such as from YUV to RGB.
- **Color space conversion**: converts colors from one color space to another including sRGB, P3, and BT.2020.
- **Color processing**: enhances the colors for better visual quality.
- **Interfaces**: connect to panels through the embedded DisplayPort (eDP) or Mobile Industry Processor Interface (MIPI) Display Serial Interface (DSI), and connect to a TV or monitor through the DisplayPort interface.
- **eDP**: defines the protocols between a host processor or graphics controller and embedded display panels that adhere to the Video Electronics Standards Association (VESA) eDP specification.
- **DisplayPort**: connects video sources to display devices such as computer monitors. DisplayPort also carries audio, USB, and other data.
- **MIPI DSI**: defines the protocols between a host processor and peripheral devices that adhere to the MIPI Alliance specifications for mobile device interfaces.
Note
The software doesn’t currently support MIPI DSI.
The `libdrm` APIs expose the hardware capabilities of the Adreno DPU engines.
## Display architecture
The Qualcomm Linux display subsystem consists of hardware and software architectures that include the following primary components.
### Display hardware architecture
The hardware architecture includes components for source and destination processing, layer mixing, compression, and display interfaces.
Figure: Display hardware architecture block diagram
The following table lists the components of the display hardware architecture.
Table: Display hardware architecture components
| Component | Description |
| --- | --- |
| Bus interface | Fetches data from memory for processing. |
| Source surface processing | Reads RGB and YUV surfaces from games and video applications.
Performs format conversion and quality improvements on the source surfaces. |
| Blending | Blends and mixes the source surfaces together. |
| Destination surface processing | Converts, corrects, and adjusts the data based on panel characteristics. |
| Compression | Reduces bandwidth and power consumption by sending compressed display buffers to the display. |
| Display interface | Generates timings for the connected display peripherals. |
### Display software architecture
The display subsystem consists of Wayland, a display server protocol, and its compositors, such as Weston. Wayland uses a client/server model in which the client application interacts with the Wayland server.
Figure: Display software architecture block diagram.
The components of the display software architecture are as follows:
Table: Display software architecture components
| Component | Description |
| --- | --- |
| Wayland sink | The Wayland sink plug-in communicates with the Weston subsystem to render the display. |
| Wayland compositor (Weston) | The Wayland compositor uses the Wayland protocol as a display server. The compositor handles the composition and rendering requirements and runs as a separate process. Weston serves as the reference implementation of a Wayland compositor. |
| Direct Rendering Manager (DRM) backend | The DRM backend software framework manages the Qualcomm Adreno DPU hardware resources. It selects the optimal composition strategy for each connected display and allocates display processor hardware resources for the layer stack received from the client. |
| `libdrm` | The `libdrm` library provides APIs for accessing DRM input/output control (IOCTL). |
| DRM/KMS framework | The DRM/Kernel mode setting (KMS) framework offers a kernel- and user-space-level interface. Applications use the `libdrm` library to access hardware features, configuration, and hardware acceleration. |
| Adreno DPU driver | The Adreno DPU driver manages the pixel data paths for different panel interfaces. |
| Adreno DPU | The Adreno DPU is a hardware-accelerated engine that performs image processing and manages display interfaces with minimal power consumption. |
#### Software APIs
The display subsystem provides the following display APIs:
- Weston APIs: handle interactions with the DRM compositor. For more information, see [Wayland client APIs](https://wayland.freedesktop.org/docs/html/apb.html) and [Wayland server APIs](https://wayland.freedesktop.org/docs/html/apc.html).
- `libdrm` APIs: handle interactions with the DRM/KMS framework. For more information, see [libdrm](https://dri.freedesktop.org/docs/drm/gpu/drm-uapi.html).
For more information, see [GStreamer application development and pipeline creation](https://gstreamer.freedesktop.org/documentation/application-development/basics/index.html).
## Related
- [Run the Weston Simple EGL client application](https://docs.qualcomm.com/doc/80-A0399-83/topic/enable_the_display.html#run-the-weston-simple-egl-client-application)
- [Display specifications](https://docs.qualcomm.com/doc/80-A0399-83/topic/display_specifications.html#display-specifications)
Last Published: Sep 27, 2026
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