# Cache interface The simulator optionally models the Hexagon processor cache. In certain cases it is useful to manage the cache data before performing an Angel call during simulation. A target application uses the cache interface to manage the cache data during simulation. The interface provides functions that wrap the processor cache maintenance instructions so a single function call can perform the cache operation on a range of addresses. The interface provides wrappers for the following cache maintenance instructions: - dccleana - dccleaninva - dcinva The cache interface functions are accessed by including the library header file, hexagon\_cache.h. To use the cache interface, an application must be linked with the library file, libhexagon.a. For more information, see the appropriate application build document. For more information on the cache maintenance instructions, see the *Qualcomm Hexagon Programmer’s Reference Manual*. ## Cache functions Use the cache interface functions to perform various combinations of flush and invalidate operations on the specified cache data. ### [hexagon_buffer_clean()](https://docs.qualcomm.com/doc/80-N3040-23/topic/cache-interface.html#contents) Flushes dirty cache data in a specified address range. - **Prototype** - void hexagon_buffer_clean(const uint8_t *address, size_t nbytes); Copy to clipboard - **Parameters** - | in | *address* | Pointer to the starting address of the bytes to be flushed. | | --- | --- | --- | | in | *nbytes* | Number of bytes to be flushed. | - **Detailed description** - Issue a dccleana instruction for each cache line in the range specified by the input parameters. This instruction looks up the data cache at the address. If the address is in the cache and has dirty data, it flushes that data out to memory. - **Returns** - None. ### [hexagon_buffer_cleaninv()](https://docs.qualcomm.com/doc/80-N3040-23/topic/cache-interface.html#contents) Flushes dirty cache data and invalidates cache lines in a specified address range. - **Prototype** - void hexagon_buffer_cleaninv(const uint8_t *address, size_t nbytes); Copy to clipboard **Parameters** > > > | in | *address* | Pointer to the starting address of the bytes to be flushed. | > | --- | --- | --- | > | in | *nbytes* | Number of bytes to be flushed. | - **Detailed description** - Issue a dccleaninva instruction for each cache line in the range specified by the input parameters. This instruction looks up the data cache at the address. If this address is in the cache and has dirty data, it flushes that data out to memory. The line is then invalidated, whether or not any dirty data was written. - **Returns** - None. ### [hexagon_buffer_inv()](https://docs.qualcomm.com/doc/80-N3040-23/topic/cache-interface.html#contents) Invalidates cache lines in a specified address range. - **Prototype** - void hexagon_buffer_inv(const uint8_t *address, size_t nbytes); Copy to clipboard **Parameters** > > > | in | *address* | Pointer to the starting address of the bytes to be flushed. | > | --- | --- | --- | > | in | *nbytes* | Number of bytes to be flushed. | - **Detailed description** - Issue a dcinva instruction for each cache line in the range specified by the input parameters. This instruction looks up the data cache at the address. If this address is in the cache, it is invalidated. - **Returns** - None. Last Published: Oct 06, 2026 [Previous Topic hexagon\_sim\_read\_pcycles()](https://docs.qualcomm.com/bundle/publicresource/80-N3040-23/topics/timer-interface.md) [Next Topic Simulator System API](https://docs.qualcomm.com/bundle/publicresource/80-N3040-23/topics/system-interface.md)