# C++ exception handling The exception handling model for the Hexagon processor is based on the DWARF2 stack unwinding mechanism. Registers R0 to R3 are reserved to communicate between exception handling library routines and exception handlers. The stack location for saved LR (see [Software stack](https://docs.qualcomm.com/doc/80-N3040-23/topic/abi-software-stack.html#software-stack)) is used to store the address of an exception handler to which the procedure returns. Last Published: Oct 06, 2026 [Previous Topic Outgoing memory arguments](https://docs.qualcomm.com/bundle/publicresource/80-N3040-23/topics/register-usage-across-calls.md) [Next Topic Operating system interface](https://docs.qualcomm.com/bundle/publicresource/80-N3040-23/topics/operating-system-interface.md)