# Debugging Multithreaded Applications

## Overview

This chapter describes the ISDB registers that are used to debug
multithreaded applications. These registers control the following
events:

- Which hardware threads enter into debug mode when a hardware or
software breakpoint occurs
- Which hardware threads resume when an external resume request occurs

## IDSB debug control registers

The following table lists the ISDB registers used to control
multithreaded application debugging.

**ISDB debug control registers**

| **Register Name** | **Bits** | **Description** |
| --- | --- | --- |
| ISDBCFG0 | 21:16 | Hardware threads that resume execution when external resume<br>request is received. |
|  | 13:8 | Hardware threads that enter debug mode when external breakpoint<br>is requested. |
| ISDBCFG1 | 29:24 | Hardware threads that enter debug mode when hardware breakpoint<br>1 is hit. |
|  | 21:16 | Hardware threads that enter debug mode when hardware breakpoint<br>0 is hit. |
|  | 13:8 | Hardware threads that enter debug mode when software breakpoint<br>is hit. |

Each 6-bit register field corresponds to the six hardware threads
(which are numbered 0-5, with 0 corresponding to the LSB in each
register field). For each bit in these fields:

- 0: Corresponding hardware thread not specified
- 1: Corresponding hardware thread specified The default setting for
these register fields is 111111.

Note

The use of register fields to control the hardware threads
enables them to enter debug mode or resume execution in groups.

Last Published: Oct 06, 2026

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