# Hexagon V75 Programmer’s Reference Manual

Contents

- [Introduction](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-introduction.html)
    - [Hexagon V75 processor architecture](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-introduction.html#hexagon-v75-processor-architecture)
    - [Instruction set](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-introduction.html#instruction-set)
- [Registers](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-registers.html)
    - [General registers](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-registers.html#general-registers)
    - [Control registers](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-registers.html#control-registers)
- [Instructions](https://docs.qualcomm.com/doc/80-N3040-23/topic/instructions.html)
    - [Hexagon processor instruction syntax](https://docs.qualcomm.com/doc/80-N3040-23/topic/instructions.html#hexagon-processor-instruction-syntax)
    - [Instruction classes](https://docs.qualcomm.com/doc/80-N3040-23/topic/instructions.html#instruction-classes)
    - [Instruction packets](https://docs.qualcomm.com/doc/80-N3040-23/topic/instructions.html#instruction-packets)
    - [Instruction intrinsics](https://docs.qualcomm.com/doc/80-N3040-23/topic/instructions.html#instruction-intrinsics)
    - [Compound instructions](https://docs.qualcomm.com/doc/80-N3040-23/topic/instructions.html#compound-instructions)
    - [Duplex instructions](https://docs.qualcomm.com/doc/80-N3040-23/topic/instructions.html#duplex-instructions)
- [Data processing](https://docs.qualcomm.com/doc/80-N3040-23/topic/data-processing.html)
    - [Data types](https://docs.qualcomm.com/doc/80-N3040-23/topic/data-processing.html#data-types)
    - [Instruction options](https://docs.qualcomm.com/doc/80-N3040-23/topic/data-processing.html#instruction-options)
    - [XTYPE operations](https://docs.qualcomm.com/doc/80-N3040-23/topic/data-processing.html#xtype-operations)
    - [ALU32 operations](https://docs.qualcomm.com/doc/80-N3040-23/topic/data-processing.html#alu32-operations)
    - [Vector operations](https://docs.qualcomm.com/doc/80-N3040-23/topic/data-processing.html#v75-vector-operations-1)
    - [CR operations](https://docs.qualcomm.com/doc/80-N3040-23/topic/data-processing.html#cr-operations)
    - [Compound operations](https://docs.qualcomm.com/doc/80-N3040-23/topic/data-processing.html#compound-operations)
    - [Special operations](https://docs.qualcomm.com/doc/80-N3040-23/topic/data-processing.html#special-operations)
- [Memory](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html)
    - [Hexagon processor memory model](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#hexagon-processor-memory-model)
    - [Memory loads](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#memory-loads)
    - [Memory stores](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#memory-stores)
    - [Dual stores](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#dual-stores)
    - [slot 1 store with slot 0 load](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#slot-1-store-with-slot-0-load)
    - [New-value stores](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#new-value-stores)
    - [Mem-ops](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#mem-ops)
    - [Addressing modes](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#addressing-modes)
    - [Conditional load/stores](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#conditional-load-stores)
    - [Cache memory](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#cache-memory)
    - [Memory ordering](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#memory-ordering)
    - [Atomic operations](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-memory.html#atomic-operations)
- [Conditional execution](https://docs.qualcomm.com/doc/80-N3040-23/topic/conditional-execution.html)
    - [Scalar predicates](https://docs.qualcomm.com/doc/80-N3040-23/topic/conditional-execution.html#scalar-predicates)
    - [Vector predicates](https://docs.qualcomm.com/doc/80-N3040-23/topic/conditional-execution.html#vector-predicates)
    - [Predicate operations](https://docs.qualcomm.com/doc/80-N3040-23/topic/conditional-execution.html#predicate-operations)
- [Software stack](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-software-stack.html)
    - [Stack structure](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-software-stack.html#stack-structure)
    - [Stack frames](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-software-stack.html#stack-frames)
    - [Stack protection](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-software-stack.html#stack-protection)
    - [Stack registers](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-software-stack.html#stack-registers)
    - [Stack instructions](https://docs.qualcomm.com/doc/80-N3040-23/topic/v75-prm-software-stack.html#stack-instructions)
- [Program flow](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html)
    - [Conditional instructions](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html#conditional-instructions)
    - [Hardware loops](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html#hardware-loops)
    - [Software branches](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html#software-branches)
    - [Speculative jumps](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html#speculative-jumps)
    - [Compare jumps](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html#compare-jumps)
    - [Register transfer jumps](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html#register-transfer-jumps)
    - [Dual jumps](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html#dual-jumps)
    - [Hint indirect jump target](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html#hint-indirect-jump-target)
    - [Pauses](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html#pauses)
    - [Exceptions](https://docs.qualcomm.com/doc/80-N3040-23/topic/program-flow.html#exceptions)
- [PMU events](https://docs.qualcomm.com/doc/80-N3040-23/topic/pmu-events.html)
    - [V75 processor event symbols](https://docs.qualcomm.com/doc/80-N3040-23/topic/pmu-events.html#v75-processor-event-symbols)
- [Instruction encoding](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html)
    - [Instructions](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#instructions)
    - [Sub-instructions](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#sub-instructions)
    - [Duplexes](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#duplexes)
    - [Instruction classes](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#instruction-classes)
    - [Instruction packets](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#instruction-packets)
    - [Loop packets](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#loop-packets)
    - [Immediate values](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#immediate-values)
    - [Scaled immediate values](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#scaled-immediate-values)
    - [Constant extenders](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#constant-extenders)
    - [New-value operands](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#new-value-operands)
    - [Instruction mapping](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-encoding.html#instruction-mapping)
- [Instruction set](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html)
    - [ALU32](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html#alu32)
    - [CR](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html#cr)
    - [JR](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html#jr)
    - [J](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html#j)
    - [LD](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html#ld)
    - [MEMOP](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html#memop)
    - [NV](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html#nv)
    - [ST](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html#id2)
    - [SYSTEM](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html#system)
    - [XTYPE](https://docs.qualcomm.com/doc/80-N3040-23/topic/instruction-set.html#xtype)

Last Published: Oct 06, 2026

[Previous Topic
Position-independent](https://docs.qualcomm.com/bundle/publicresource/80-N3040-23/topics/coding-examples.md) [Next Topic
Introduction](https://docs.qualcomm.com/bundle/publicresource/80-N3040-23/topics/v75-prm-introduction.md)