# Hexagon V79 HVX Programmer’s Reference Manual

Contents

- [Introduction](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_introduction.html)
    - [SIMD coprocessor](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_introduction.html#simd-coprocessor)
    - [HVX features](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_introduction.html#hvx-features)
- [HVX Revision history](https://docs.qualcomm.com/doc/80-N3040-23/topic/hvx-revision.html)
- [Registers](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_registers.html)
    - [Vector data registers](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_registers.html#vector-data-registers)
    - [Vector predicate registers](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_registers.html#vector-predicate-registers)
- [Memory](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_memory.html)
    - [Alignment](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_memory.html#alignment)
    - [HVX local memory: VTCM](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_memory.html#hvx-local-memory-vtcm)
    - [Scatter and gather](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_memory.html#scatter-and-gather)
    - [Memory type](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_memory.html#memory-type)
    - [Nontemporal](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_memory.html#nontemporal)
    - [Permissions](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_memory.html#permissions)
    - [Ordering](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_memory.html#ordering)
    - [Atomicity](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_memory.html#atomicity)
    - [Maximizing performance of the vector memory system](https://docs.qualcomm.com/doc/80-N3040-23/topic/src_memory.html#maximizing-performance-of-the-vector-memory-system)
- [Vector instructions](https://docs.qualcomm.com/doc/80-N3040-23/topic/vector-instructions.html)
    - [VLIW packing rules](https://docs.qualcomm.com/doc/80-N3040-23/topic/vector-instructions.html#vliw-packing-rules)
    - [Vector load/store](https://docs.qualcomm.com/doc/80-N3040-23/topic/vector-instructions.html#vector-load-store)
    - [Scatter and gather](https://docs.qualcomm.com/doc/80-N3040-23/topic/vector-instructions.html#scatter-and-gather)
    - [Memory instruction slot combinations](https://docs.qualcomm.com/doc/80-N3040-23/topic/vector-instructions.html#memory-instruction-slot-combinations)
    - [Special instructions](https://docs.qualcomm.com/doc/80-N3040-23/topic/vector-instructions.html#special-instructions)
    - [Instruction latency](https://docs.qualcomm.com/doc/80-N3040-23/topic/vector-instructions.html#instruction-latency)
    - [Slot/resource/latency summary](https://docs.qualcomm.com/doc/80-N3040-23/topic/vector-instructions.html#slot-resource-latency-summary)
- [HVX floating point](https://docs.qualcomm.com/doc/80-N3040-23/topic/hvx-floating-point.html)
    - [Programming with HVX floating point](https://docs.qualcomm.com/doc/80-N3040-23/topic/hvx-floating-point.html#programming-with-hvx-floating-point)
    - [HVX floating point behavior](https://docs.qualcomm.com/doc/80-N3040-23/topic/hvx-floating-point.html#hvx-floating-point-behavior)
    - [IEEE intrinsics](https://docs.qualcomm.com/doc/80-N3040-23/topic/hvx-floating-point.html#ieee-intrinsics)
- [HVX PMU events](https://docs.qualcomm.com/doc/80-N3040-23/topic/hvx-pmu-events.html)
- [HVX instruction set](https://docs.qualcomm.com/doc/80-N3040-23/topic/hvx-instruction-set.html)
    - [Instruction symbols](https://docs.qualcomm.com/doc/80-N3040-23/topic/hvx-instruction-set.html#instruction-symbols)
    - [New-value operands](https://docs.qualcomm.com/doc/80-N3040-23/topic/hvx-instruction-set.html#new-value-operands)
    - [HVX instruction set architecture](https://docs.qualcomm.com/doc/80-N3040-23/topic/hvx-instruction-set.html#hvx-instruction-set-architecture)

Last Published: Oct 06, 2026

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