# Overview

The simulator supports the following features:

- Interactive debugging (via TRACE32 or LLDB debugger)

    The simulator supports interactive debugging indirectly by serving as
a simulation engine for the TRACE32 debugger (via MCD) or the
text-based LLDB debugger. The simulator can also be used directly as
a non-interactive simulation engine.
- Execution profiling (via gprof profiler)

    Execution profiling is supported using the text-based gprof profiler.
Profiling can be performed on any Hexagon application (standalone,
RTOS-based, single-threaded, or multi-threaded).

    The Hexagon profiler can collect and postprocess execution time
statistics to produce an HTML that can be opened and navigated in any
browser.
- Execution trace and statistics (via simulator or PMU)

    The simulator can generate execution traces and statistics.
Statistics can be generated in either a simulator-specific format, or
as Hexagon PMU statistics. The simulator-specific statistics can be
generated for all or selected parts of the target application.
- External devices (via co-simulator plug-ins)

    The simulator supports plug-in co-simulators to enable co-simulations
with external devices.
- Execution timing (via timer interface) and cache maintenance (via
cache interface) The simulator provides timer and cache APIs
(implemented as C libraries) that enable

    Hexagon applications to collect execution timing information and
maintain the processor caches while they are being simulated.
- Client-controlled simulation (via APIs)

    The simulator provides an API that enables client program control of
a Hexagon simulation, modeling the Hexagon core in a system
simulation environment. The API is also used to develop and perform
co-simulations with external devices and higher-level system
simulations.

The simulator is not cycle-accurate. With timing enabled (see
[processor modeling](https://docs.qualcomm.com/doc/80-N3040-23/topic/use-the-simulator.html#simulator-processor-modeling)), the simulator is
cycle-approximate with a performance target of 3% cycle accuracy when
compared to similarly configured hardware. Various aspects of the
micro-architecture are modeled accurately, but other factors such as
bus clock ratio and bus delay will impact the overall accuracy.

## Processor versions

The simulator supports multiple versions of the Hexagon processor:

- When used as a debugger simulation engine, the simulator
automatically determines the processor version of an object file from
information stored in the file.
- When used directly, the simulator defines command options (such as
`-mv68`) that specify the target Hexagon processor architecture to
simulate.

For more information on these (and related) command options, see
[processor version](https://docs.qualcomm.com/doc/80-N3040-23/topic/use-the-simulator.html#simulator-processor-version).

For more information on the Hexagon processors, see the *QualcommHexagon Programmer’s Reference Manual*.

Not all processor versions are supported in a specific Hexagon tools
release.

Supported processor versions

| Tools release | Processor versions |
| --- | --- |
| 8.0.x | V5, V55, V56, V60, V61, V62 |
| 8.1.x | V5, V55, V56, V60, V61, V62, V65 |
| 8.2.x | V5, V55, V56, V60, V61, V62, V65, V66 |
| 8.3.x | V55, V56, V60, V61, V62, V65, V66, V67, V67 Small Core (V67t) |
| 8.4.x | V62, V65, V66, V67, V67 Small Core (V67t), V68 |
| 8.5.x | V65, V66, V67, V67 Small Core (V67t), V68, V69, V71, V71 Small Core (V71t) |
| 8.6.x | V65, V66, V67, V67 Small Core (V67t), V68, V69, V71, V71 Small Core (V71t), V73 |
| 8.7.x | V65, V66, V67, V67 Small Core (V67t), V68, V69, V71, V71 Small Core (V71t), V73, V75 |
| 8.8.x | V68, V69, V71, V71 Small Core (V71t), V73, V75, V79 |
| 19.0.x | V68, V69, V71, V71 Small Core (V71t), V73, V75, V79, V81 |
| 21.0.x | V68, V69, V71, V71 Small Core (V71t), V73, V75, V79, V81, V83, V85 |
| 23.0.x | V68, V69, V71, V71 Small Core (V71t), V73, V75, V79, V81, V83, V85,<br>V89, V91 |

## Type definitions

Throughout this document, variable types are specified with type
definitions. These definitions are defined in the *HexagonTypes.h* file
in the release distribution.

Hexagon-specific type definitions

| Type Name | Description |
| --- | --- |
| HEX\_*&lt;size&gt;*s\_t<br>HEX\_*&lt;size&gt;*u\_t | Numeric value.<br><ul class="simple"><br><li><p><em>&lt;size&gt;</em> = Digit denoting object size in bytes</p></li><br><li><p>s = Signed value</p></li><br><li><p>u = Unsigned value</p></li><br></ul> |
| HEX\_VA\_t | Hexagon virtual address.<br><br><br>HEX\_VA\_t is defined to be equivalent to HEX\_4u\_t. |
| HEX\_PA\_t | Hexagon physical address.<br><br><br>HEX\_PA\_t is defined to be equivalent to HEX\_8u\_t. |
| HEXAPI\_*&lt;name&gt;* | API enumeration parameter. |

Last Published: Oct 06, 2026

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