# SS-USB and HS-USB with PHY layout guidelines

Source: [https://docs.qualcomm.com/doc/80-PV086-5P/topic/SS-USB-and-HS-USB-with-PHY-layout-guidelines.html](https://docs.qualcomm.com/doc/80-PV086-5P/topic/SS-USB-and-HS-USB-with-PHY-layout-guidelines.html)

The following are the SS-USB and HS-USB guidelines: 
- External components must be located near the USB connector.
- There are relatively fast edge rates, so they must be routed away from sensitive
          circuits and signals (RF, audio, and 38.4 MHz XO).
- If a USB connector is used as a charger input:
    - The USB\_VBUS node must be routed to the PMIC device using extremely wide traces or
              sub-planes.
    - For fetailed recommendations see the *PM8150/PM8250 Power Management IC Design                Guidelines/Training Slides* (80-PD995-5).
- Even if the USB connector is not used for charging, USB\_VBUS can be used as the power
          bus for the USB. The trace width must be sized depending on the length of VBUS and the
          expected current.
    - USB peripheral currents can be up to 900 mA for SS and 500 mA for HS.

      **Additional SS-USB guidelines**
- Maintain good isolation between the USB connector and RF antennas (especially 2.4
          GHz).
- Route the RF signals operating at a 2.4 GHz frequency with the highest isolation
          possible from USB0\_SS\_TX/RX and USB1\_SS\_TX/RX traces.
- USB SS Tx AC coupling can be anywhere along the line, but better be placed close to
          source or the ESD/connector side to keep good signal integrity (SI) of main route on
          PCB.
- Route differential pairs in the inner layers with a solid GND reference to have good
          impedance control and to minimize discontinuities.
- Keep isolation between the Tx pair, Rx pair, and DP/DM to avoid crosstalk.
- Keep the 1 kΩ resistor stubs on DP/DM lines as short as possible.
- If core vias are used, use no more than two core vias per signal line to limit
          stubs.
- If sending USB over a flex PCB, be extra careful to meet the entire channel insertion
          loss (IL) budget. A poor flex will violate USB IL specifications and may force the need
          for a re-driver circuit to be added to the eBOM.

**Parent Topic:** [PCB layout guidelines](https://docs.qualcomm.com/doc/80-PV086-5P/topic/pcb-layout-guidelines.html)

Last Published: Jul 07, 2023

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