# Unused pin termination Source: [https://docs.qualcomm.com/doc/80-PV086-5P/topic/Unused-pin-termination.html](https://docs.qualcomm.com/doc/80-PV086-5P/topic/Unused-pin-termination.html) The following table lists the unused pin termination in various interfaces. Note: If a PHY is not used, then proper software change needs to be made to keep the PHY in the off state. | Interface | Signal | Unused pin state | | --- | --- | --- | | ***UFS0/UFS1*** | ***UFS0/UFS1*** | ***UFS0/UFS1*** | | UFS0 | UFS0\_RX0\_M | Float | | UFS0 | UFS0\_RX0\_P | Float | | UFS0 | UFS0\_TX0\_M | Float | | UFS0 | UFS0\_TX0\_P | Float | | UFS0 | UFS0\_RX1\_M | Float | | UFS0 | UFS0\_RX1\_P | Float | | UFS0 | UFS0\_TX1\_M | Float | | UFS0 | UFS0\_TX1\_P | Float | | UFS0 | UFS0\_REFCLK | Float | | UFS0 | UFS0\_RESET | Float | | UFS0 | VDDA\_UFS0\_1P2 | Connect to power supply | | UFS0 | VDDA\_UFS0\_CORE | Connect to power supply | | UFS1 | UFS1\_REFCLK | Float | | UFS1 | UFS1\_RX0\_M | Float | | UFS1 | UFS1\_RX0\_P | Float | | UFS1 | UFS1\_TX0\_M | Float | | UFS1 | UFS1\_TX0\_P | Float | | UFS1 | VDDA\_UFS1\_1P2 | Connect to power supply | | UFS1 | VDDA\_UFS1\_CORE | Connect to power supply | | ***SDC2*** | ***SDC2*** | ***SDC2*** | | SDC2 | SDC2\_CLK | Float | | SDC2 | SDC2\_CMD | Float | | SDC2 | SDC2\_DATA0 | Float | | SDC2 | SDC2\_DATA1 | Float | | SDC2 | SDC2\_DATA2 | Float | | SDC2 | SDC2\_DATA3 | Float | | SDC2 | VDDPX\_VBIAS\_SDC | GND | | SDC2 | VDDPX\_2 | GND | | ***MIPI DSI0/DSI1*** | ***MIPI DSI0/DSI1*** | ***MIPI DSI0/DSI1*** | | MIPI DSI0 | DSI0\_A0\_LN0\_P | Float | | MIPI DSI0 | DSI0\_B0\_LN0\_N | Float | | MIPI DSI0 | DSI0\_C0\_LN1\_P | Float | | MIPI DSI0 | DSI0\_A1\_LN1\_N | Float | | MIPI DSI0 | DSI0\_B1\_CLK\_P | Float | | MIPI DSI0 | DSI0\_C1\_CLK\_N | Float | | MIPI DSI0 | DSI0\_A2\_LN2\_P | Float | | MIPI DSI0 | DSI0\_B2\_LN2\_N | Float | | MIPI DSI0 | DSI0\_C2\_LN3\_P | Float | | MIPI DSI0 | DSI0\_NC\_LN3\_N | Float | | MIPI DSI1 | DSI1\_A0\_LN0\_P | Float | | MIPI DSI1 | DSI1\_B0\_LN0\_N | Float | | MIPI DSI1 | DSI1\_C0\_LN1\_P | Float | | MIPI DSI1 | DSI1\_A1\_LN1\_N | Float | | MIPI DSI1 | DSI1\_B1\_CLK\_P | Float | | MIPI DSI1 | DSI1\_C1\_CLK\_N | Float | | MIPI DSI1 | DSI1\_A2\_LN2\_P | Float | | MIPI DSI1 | DSI1\_B2\_LN2\_N | Float | | MIPI DSI1 | DSI1\_C2\_LN3\_P | Float | | MIPI DSI1 | DSI1\_NC\_LN3\_N | Float | | MIPI DSI1 | VDDA\_DSI\_1P2 | Connect to power supply | | MIPI DSI1 | VDDA\_DSI\_0P9 | Connect to power supply | | MIPI DSI1 | VDDA\_DSI\_PLL\_0P9 | Connect to power supply | | ***USB and DisplayPort*** | ***USB and DisplayPort*** | ***USB and DisplayPort*** | | USB0\_SS\_DP | USB0\_SS\_TX0\_M | Float | | USB0\_SS\_DP | USB0\_SS\_TX0\_P | Float | | USB0\_SS\_DP | USB0\_SS\_RX0\_M | Float | | USB0\_SS\_DP | USB0\_SS\_RX0\_P | Float | | USB0\_SS\_DP | USB0\_SS\_TX1\_M | Float | | USB0\_SS\_DP | USB0\_SS\_TX1\_P | Float | | USB0\_SS\_DP | USB0\_SS\_RX1\_M | Float | | USB0\_SS\_DP | USB0\_SS\_RX1\_P | Float | | USB0\_SS\_DP | VDDA\_USB0\_SS\_DP\_1P2 | Connect to power supply | | USB0\_SS\_DP | VDDA\_USB0\_SS\_DP\_CORE | Connect to power supply | | USB0\_HS | USB0\_HS\_DM | Float | | USB0\_HS | USB0\_HS\_DP | Float | | USB0\_HS | VDDA\_USB\_HS\_1P8 | Connect to power supply | | USB0\_HS | VDDA\_USB\_HS\_3P1 | Connect to power supply | | USB0\_HS | VDD\_USB\_HS\_CORE | Connect to power supply | | USB1\_SS | USB1\_SS\_TX\_M | Float | | USB1\_SS | USB1\_SS\_TX\_P | Float | | USB1\_SS | USB1\_SS\_RX\_M | Float | | USB1\_SS | USB1\_SS\_RX\_P | Float | | USB1\_SS | VDDA\_USB1\_SS\_1P2 | Connect to power supply | | USB1\_SS | VDDA\_USB1\_SS\_CORE | Connect to power supply | | USB1\_HS | USB1\_HS\_DM | Float | | USB1\_HS | USB1\_HS\_DP | Float | | USB1\_HS | VDDA\_USB\_HS\_1P8 | Connect to power supply | | USB1\_HS | VDDA\_USB\_HS\_3P1 | Connect to power supply | | USB1\_HS | VDD\_USB\_HS\_CORE | Connect to power supply | | DisplayPort | DP\_AUX\_P | Float | | DisplayPort | DP\_AUX\_N | Float | | MIPI CSI0 | CSI0\_NC\_CLK\_P | Float | | MIPI CSI0 | CSI0\_A0\_CLK\_N | Float | | MIPI CSI0 | CSI0\_B0\_LN0\_P | Float | | MIPI CSI0 | CSI0\_C0\_LN0\_N | Float | | MIPI CSI0 | CSI0\_A1\_LN1\_P | Float | | MIPI CSI0 | CSI0\_B1\_LN1\_N | Float | | MIPI CSI0 | CSI0\_C1\_LN2\_P | Float | | MIPI CSI0 | CSI0\_A2\_LN2\_N | Float | | MIPI CSI0 | CSI0\_B2\_LN3\_P | Float | | MIPI CSI0 | CSI0\_C2\_LN3\_N | Float | | MIPI CSI1 | CSI1\_NC\_CLK\_P | Float | | MIPI CSI1 | CSI1\_A0\_CLK\_N | Float | | MIPI CSI1 | CSI1\_B0\_LN0\_P | Float | | MIPI CSI1 | CSI1\_C0\_LN0\_N | Float | | MIPI CSI1 | CSI1\_A1\_LN1\_P | Float | | MIPI CSI1 | CSI1\_B1\_LN1\_N | Float | | MIPI CSI1 | CSI1\_C1\_LN2\_P | Float | | MIPI CSI1 | CSI1\_A2\_LN2\_N | Float | | MIPI CSI1 | CSI1\_B2\_LN3\_P | Float | | MIPI CSI1 | CSI1\_C2\_LN3\_N | Float | | MIPI CSI2 | CSI2\_NC\_CLK\_P | Float | | MIPI CSI2 | CSI2\_A0\_CLK\_N | Float | | MIPI CSI2 | CSI2\_B0\_LN0\_P | Float | | MIPI CSI2 | CSI2\_C0\_LN0\_N | Float | | MIPI CSI2 | CSI2\_A1\_LN1\_P | Float | | MIPI CSI2 | CSI2\_B1\_LN1\_N | Float | | MIPI CSI2 | CSI2\_C1\_LN2\_P | Float | | MIPI CSI2 | CSI2\_A2\_LN2\_N | Float | | MIPI CSI2 | CSI2\_B2\_LN3\_P | Float | | MIPI CSI2 | CSI2\_C2\_LN3\_N | Float | | MIPI CSI3 | CSI3\_NC\_CLK\_P | Float | | MIPI CSI3 | CSI3\_A0\_CLK\_N | Float | | MIPI CSI3 | CSI3\_B0\_LN0\_P | Float | | MIPI CSI3 | CSI3\_C0\_LN0\_N | Float | | MIPI CSI3 | CSI3\_A1\_LN1\_P | Float | | MIPI CSI3 | CSI3\_B1\_LN1\_N | Float | | MIPI CSI3 | CSI3\_C1\_LN2\_P | Float | | MIPI CSI3 | CSI3\_A2\_LN2\_N | Float | | MIPI CSI3 | CSI3\_B2\_LN3\_P | Float | | MIPI CSI3 | CSI3\_C2\_LN3\_N | Float | | MIPI CSI4 | CSI4\_NC\_CLK\_P | Float | | MIPI CSI4 | CSI4\_A0\_CLK\_N | Float | | MIPI CSI4 | CSI4\_B0\_LN0\_P | Float | | MIPI CSI4 | CSI4\_C0\_LN0\_N | Float | | MIPI CSI4 | CSI4\_A1\_LN1\_P | Float | | MIPI CSI4 | CSI4\_B1\_LN1\_N | Float | | MIPI CSI4 | CSI4\_C1\_LN2\_P | Float | | MIPI CSI4 | CSI4\_A2\_LN2\_N | Float | | MIPI CSI4 | CSI4\_B2\_LN3\_P | Float | | MIPI CSI4 | CSI2\_C2\_LN3\_N | Float | | MIPI CSI5 | CSI5\_NC\_CLK\_P | Float | | MIPI CSI5 | CSI5\_A0\_CLK\_N | Float | | MIPI CSI5 | CSI5\_B0\_LN0\_P | Float | | MIPI CSI5 | CSI5\_C0\_LN0\_N | Float | | MIPI CSI5 | CSI5\_A1\_LN1\_P | Float | | MIPI CSI5 | CSI5\_B1\_LN1\_N | Float | | MIPI CSI5 | CSI5\_C1\_LN2\_P | Float | | MIPI CSI5 | CSI5\_A2\_LN2\_N | Float | | MIPI CSI5 | CSI5\_B2\_LN3\_P | Float | | MIPI CSI5 | CSI5\_C2\_LN3\_N | Float | | CSI power | VDD\_A\_CSI0\_0P9 | Connect to power supply | | CSI power | VDD\_A\_CSI012\_1P2 | Connect to power supply | | CSI power | VDD\_A\_CSI1\_2\_0P9 | Connect to power supply | | CSI power | VDD\_A\_CSI3\_0P9 | Connect to power supply | | CSI power | VDD\_A\_CSI345\_1P2 | Connect to power supply | | CSI power | VDD\_A\_CSI4\_5\_0P9 | Connect to power supply | | PCIE0 | PCIE0\_REFCLK\_M | Float | | PCIE0 | PCIE0\_REFCLK\_P | Float | | PCIE0 | PCIE0\_TX\_M | Float | | PCIE0 | PCIE0\_TX\_P | Float | | PCIE0 | PCIE0\_RX\_M | Float | | PCIE0 | PCIE0\_RX\_P | Float | | PCIE0 | VDDA\_PCIE0\_PLL\_1P2 | Connect to power supply | | PCIE0 | VDDA\_PCIE0\_CORE | Connect to power supply | | PCIE1 | PCIE1\_REFCLK\_M | Float | | PCIE1 | PCIE1\_REFCLK\_P | Float | | PCIE1 | PCIE1\_TX0/1\_M | Float | | PCIE1 | PCIE1\_TX0/1\_P | Float | | PCIE1 | PCIE1\_RX0/1\_M | Float | | PCIE1 | PCIE1\_RX0/1\_P | Float | | PCIE1 | VDDA\_PCIE1\_PLL\_1P2 | Connect to power supply | | PCIE1 | VDDA\_PCIE1\_CORE | Connect to power supply | | PCIE2 | PCIE2\_REFCLK\_M | Float | | PCIE2 | PCIE2\_REFCLK\_P | Float | | PCIE2 | PCIE2\_TX0/1\_M | Float | | PCIE2 | PCIE2\_TX0/1\_P | Float | | PCIE2 | PCIE2\_RX0/1\_M | Float | | PCIE2 | PCIE2\_RX0/1\_P | Float | | PCIE2 | VDDA\_PCIE2\_PLL\_1P2 | Connect to power supply | | PCIE2 | VDDA\_PCIE2\_CORE | Connect to power supply | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | **Parent Topic:** [PCB design considerations](https://docs.qualcomm.com/doc/80-PV086-5P/topic/PCB-design-considerations.html) Last Published: Jul 07, 2023 [Previous Topic DCR measurement for PDN rails](https://docs.qualcomm.com/bundle/publicresource/80-PV086-5P/topics/DCR-measurement-for-PDN-rails.md) [Next Topic PCB layout guidelines](https://docs.qualcomm.com/bundle/publicresource/80-PV086-5P/topics/pcb-layout-guidelines.md)