# Compute DSP with Quad HVX and HCP 1.1 Source: [https://docs.qualcomm.com/doc/80-PV086-5P/topic/compute-dsp-with-quad-hvx-and-hcp.html](https://docs.qualcomm.com/doc/80-PV086-5P/topic/compute-dsp-with-quad-hvx-and-hcp.html) The features of Compute DSP are listed below. - Hexagon DSP with Quad-HVX - Dual cluster base core for twice the scalar capability - Dual-HVX → Quad-HVX for twice the wide vector capability - HVX are new wide-vector instructions and registers to support high-performance vision processing and machine learning processing - HCP1.1 (Hexagon co-processors) - Vision and imaging hardware accelerators - Fixed function configurable hardware to offload and accelerate software algorithmic functions - Designed to be used with the fully programmable Hexagon DSP cores - Combination of Hexagon DSP plus HCP offers high performance and low power solutions while maintaining software flexibility - Snapdragon UBWC 4.0 - Memory compression to reduce bandwidth requirements for better performance and lower power than Snapdragon UBWC 3.0. Figure : 1. Compute DSP with Quad-HVX and HCP1.1  ## Use cases of HVX and HCP The following table captures the use case benefits of HVX and HCP: Table : 1. Use cases of HVX and HCP | Use cases | Description | | --- | --- | | Video playback enhancement |