# Carrier, storage, and handling information
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
## Carrier
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
### Tape and reel information
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
All QTI tape carrier systems conform to EIA-481 standards.
A simplified sketch of the QCC748 tape carrier is shown in the following
figure, including the proper part orientation, maximum number of devices per reel, and
key dimensions.
Figure : QCC748 QFN-56 carrier tape drawing with part orientation
Tape-handling recommendations are shown in the following figure.
Figure : Tape handling

### Matrix tray information
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
All QTI matrix tray carriers conform to JEDEC standards.
The device pin 1 is oriented to the chamfered corner of the matrix tray.
See the following figure for matrix-tray key attributes and dimensions.
Each tray of the QCC748 contains up to 260 devices. Production orders of
the QCC748 that are shipped in matrix tray carriers will be in 10 + 1
tray stacks of 2600 units. The stacking configuration and quantity for sample orders
will vary.
Figure : QCC748 QFN-56 matrix-tray key attributes and dimensions
## Storage
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
### Bagged storage conditions
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
QCC748 devices delivered in tape and reel carriers must be stored in
sealed, moisture barrier, antistatic bags. See the IC Products Packing
Method document (80-VK055-1) for the expected shelf life.
### Out-of-bag duration
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
The out-of-bag duration is the time a device can be on the factory floor before being
installed onto a PCB. It is defined by the device MSL rating, as described in [Thermal characteristics](https://docs.qualcomm.com/doc/80-WL748-1/topic/mechanical-information.html#thermal-characteristics).
## Handling
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
Tape handling was described in [Tape and reel information](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html#tape-and-reel-information). Other
(IC-specific) handling guidelines are presented in the following subsections.
### Baking
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
It is not necessary to bake the QCC748 if the conditions specified in
[Bagged storage conditions](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html#bagged-storage-conditions) and [Out-of-bag duration](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html#out-of-bag-duration) have not been exceeded.
It is necessary to bake the QCC748 if any condition specified in [Bagged storage conditions](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html#bagged-storage-conditions) or [Out-of-bag duration](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html#out-of-bag-duration)
has been exceeded. The baking conditions are specified on the moisture-sensitive caution
label attached to each bag; see the IC Products Packing Method
(80-VK055-1) document for details.
Caution:
If baking is required, the devices must be
transferred into trays that can be baked to at least 125°C. Devices should not be baked
in tape and reel carriers at any temperature.
### Electrostatic discharge
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
Electrostatic discharge (ESD) occurs naturally in laboratory and factory environments. An
established high-voltage potential is always at risk of discharging to a lower
potential. If this discharge path is through a semiconductor device, destructive damage
may result.
ESD countermeasures and handling methods must be developed and used to control the
factory environment at each manufacturing site.
QTI products must be handled according to the ESD Association standard: ANSI/ESD
S20.20-1999, Protection of Electrical and Electronic Parts, Assemblies, and
Equipment.
See [Reliability qualifications summary](https://docs.qualcomm.com/doc/80-WL748-1/topic/part-reliability.html#reliability-qualifications-summary) for the QCC748 ESD ratings.
## Bar code label and packing for shipment
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
See the IC Products Packing Method (80-VK055-1) document for all
packing-related information, including bar code label details.
## Reflow profile
Source: [https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html](https://docs.qualcomm.com/doc/80-WL748-1/topic/carrier-storage-and-handling-information.html)
For details, refer to IPC/JEDEC J-STD-020E.
Figure : Classification Profile (not to scale)
| Profile feature | Sn-Pb eutectic assembly | Pb-Free assembly |
| --- | --- | --- |
| Preheat/Soak Temperature Min (Tsmin) Temperature Max (Tsmax)
Time (tS) from (Tsmin to Tsmax) | 100°C
150°C
60-120 seconds | 150°C
200°C
60-120 seconds |
| Ramp-up rate (TL to Tp) | 3°C/second max. | 3°C/second max. |
| Liquidous temperature (TL) Time (tL) maintained above TL | 183°C
60-150 seconds | 217°C
60-150 seconds |
| Peak package body temperature (Tp) | 240°C+0/-5 °C | 250°C+0/-5 °C |
| Time (tp)\* within 5 °C of the specified classification temperature (Tc) | 10-30 seconds | 20-40 seconds |
| Ramp-down rate (Tp to TL) | 6°C/second max | 6°C/second max |
| Time 25 °C to peak temperature | 6 minutes max | 8 minutes max |
| Tolerance for peak profile temperature (Tp) is defined as a supplier minimum and a user maximum. | Tolerance for peak profile temperature (Tp) is defined as a supplier minimum and a user maximum. | Tolerance for peak profile temperature (Tp) is defined as a supplier minimum and a user maximum. |
Last Published: Apr 22, 2026
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