# Ethernet architecture The following figure shows the architecture and its components involved in communicating data over Ethernet on the reference kits. Ethernet architecture on reference kits Tab QCS6490 Tab IQ-9075 Tab IQ-8275 Tab IQ-615 The following table describes the components of Ethernet architecture on QCS6490. | Component | Description | | --- | --- | | Application processor subsystem (APSS) | Runs on a Linux-based operating system. | | Ethernet driver |
A software driver in the Linux kernel.
Provides data connectivity over a wired Ethernet interface.
A low-level driver dedicated to manage the Ethernet physical layer.
Implements a software state machine required to handle the lifecycle of PHY, from initialization to link establishment.
Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.
Both QEP and AQR PHYs are validated on RB3 Gen 2 Development Kit.
QEP PHY for 2.5 GbE is available by default on SGMII interface. It is enabled and verified on a 1 x QEP8121 IX connector.
USB2ETH interface with 1 GbE is available by default and verified on RJ45 connector.
AQR PHY for 10 GbE is optional and may not be available on the development kit. If available, it is verified on a 1 x AQR113C IX connector.
To bring up hardware configurations other than the configuration provided by Qualcomm, see Bring up alternate hardware enablement.
For information on how to configure RJ45 based USB2ETH, see Configure Ethernet with RJ45
A software driver in the Linux kernel.
Provides data connectivity over a wired Ethernet interface.
A low-level driver dedicated to manage the Ethernet physical layer.
Implements a software state machine required to handle the lifecycle of PHY, from initialization to link establishment.
Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.
A software driver in the Linux kernel.
Provides data connectivity over a wired Ethernet interface.
A low-level driver dedicated to manage the Ethernet physical layer.
Implements a software state machine required to handle the lifecycle of PHY, from initialization to link establishment.
Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.
A software driver in the Linux kernel.
Provides data connectivity over a wired Ethernet interface.
A low-level driver dedicated to manage the Ethernet physical layer.
Implements a software state machine required to handle the lifecycle of PHY, from initialization to link establishment.
Interacts with an underlying management data input/output (MDIO) to access the PHY register and perform operations such as detecting alive and/or linked PHYs.